Computer Engineering graduate with coursework experience in Digital IC Design defining cellview schematics at the transistor level and RTL in Verilog/VHDL using the Cadence Virtuoso design systems. I specialize in embedded development for microprocessor-oriented designs using HAL or bare metal in C.
Experience
2023 — Now
2022 — 2022
2020 — 2020
Education
Rochester Institute of Technology
Bachelor's degree
2017 — 2023