Peco InspX designs and manufactures the world's most capable X-ray inspection systems for the food, beverage, and pharmaceutical industries. I am responsible for the software product and building up the next generation of capabilities from system to algorithm level.

I contributed to the flagship place-and-route tool, used by major semiconductor companies to implement cutting-edge silicon chips. As a member of the team responsible for clock tree synthesis (CTS) and clock tree optimization for power-performance-area (PPA), I focused on infrastructure and APIs and developed key engines for clock skew and latency optimization.

Lattice produces low-power, small-footprint FPGAs for IoT, edge, and industrial applications. I was part of a small team responsible for the FPGA design software. As a new grad, I quickly ramped up to take ownership of the signal routing engine, a mission-critical piece of the software tool.

Extended summer internship with the FPGA evaluation boards and kits marketing team. I ported reference designs for new device families and assisted with field enablement of FPGA and SoC evaluation kits.